CLIP Lab
The Computational logic, Languages, Implementation, and Parallelism Laboratory

CLIP Group's Publications up to 1990


Articles in Refereed Journals:

  1. M. Hermenegildo, E. Tick. Memory Referencing Characteristics and Caching Performance of AND-Parallel Prolog on Shared-Memory Architectures. New Generation Computing, Vol. 7, Num. 1, pages 37-58, Springer Verlag, October 1989.

  2. M. Hermenegildo, R. Warren. Designing a High-Performance Parallel Logic Programming System. Computer Architecture News, Special Issue on Parallel Symbolic Programming, Vol. 15, Num. 1, pages 43-53, ACM, March 1987.


Articles in Refereed Conferences:

  1. K. Muthukumar, M. Hermenegildo. Determination of Variable Dependence Information at Compile-Time Through Abstract Interpretation. 1989 North American Conference on Logic Programming, pages 166-189, MIT Press, October 1989.

  2. M. Hermenegildo, F. Rossi. On the Correctness and Efficiency of Independent And-Parallelism in Logic Programs. 1989 North American Conference on Logic Programming, pages 369-390, MIT Press, October 1989.

  3. K. Muthukumar, M. Hermenegildo. Complete and Efficient Methods for Supporting Side Effects in Independent/Restricted And-parallelism. 1989 International Conference on Logic Programming, pages 80-101, MIT Press, June 1989.

  4. M. Hermenegildo, E. Tick. Memory Performance of AND-Parallel Prolog on Shared-Memory Architectures. Proceedings of the 17th International Conference on Parallel Processing, pages 17-22, IEEE, August 1988.

  5. R. Warren, M. Hermenegildo, S. K. Debray. On the Practicality of Global Flow Analysis of Logic Programs. Fifth International Conference and Symposium on Logic Programming, pages 684-699, MIT Press, August 1988.

  6. A. Guzmán, M. Hermenegildo. Constructs and Evaluation Strategies for Intelligent Speculative Parallelism - Armageddon Revisited. 1988 ACM Computer Science Conference, pages 106-115, ACM, February 1988.

  7. M. Hermenegildo. Relating Goal Scheduling, Precedence, and Memory Management in AND-Parallel Execution of Logic Programs. Fourth International Conference on Logic Programming, pages 556-575, MIT Press, University of Melbourne, May 1987.

  8. M. Hermenegildo, R. I. Nasr. Efficient Management of Backtracking in AND-parallelism. Third International Conference on Logic Programming, LNCS, Num. 225, pages 40-55, Springer-Verlag, Imperial College, July 1986.

  9. M. Hermenegildo. An Abstract Machine for Restricted AND-parallel Execution of Logic Programs. Third International Conference on Logic Programming, Lecture Notes in Computer Science, Num. 225, pages 25-40, Springer-Verlag, Imperial College, July 1986.

  10. G. J. Lipovski, M. Hermenegildo. B-LOG: A Branch and Bound Methodology for the Parallel Execution of Logic Programs. 1985 IEEE International Conference on Parallel Processing, pages 560-568, IEEE Computer Society, August 1985.


Books and Monographs:

  1. M. Hermenegildo. Proc. of the Workshop on Future Directions in Logic Programming. 210 pages, MCC, Austin, TX, April 1987.

  2. M. Hermenegildo. An Abstract Machine Based Execution Model for Computer Architecture Design and Efficient Implementation of Logic Programs in Parallel. Ph.D. Thesis, Dept. of Electrical and Computer Engineering (Dept. of Computer Science TR-86-20), University of Texas at Austin, Austin, Texas 78712, 244 pages, UMI, Boston, MA and U. of Texas, August 1986.

  3. M. Hermenegildo. Computational Models for Sequential and Parallel Execution of Logic Programs on a Reconfigurable Architecture. Ms. Thesis, The University of Texas at Austin, ENS Bldg. 515, Austin, TX 78712, 122 pages, June 1984.


Publications in Refereed Workshops:

  1. I. Walker, M. Hermenegildo. An application of AI techniques and parallel implementation technology to the trajectory planning problem for redundant robot manipulators. 1987 IEEE International Workshop on Robotics: Trends, Technology, and Applications, pages 53-61, ETSIInf, IEEE, February 1988.


Technical Reports and Manuals:

  1. M. Hermenegildo, K. Greene. &-Prolog and its Performance: Exploiting Independent And-Parallelism. Num. ACA-ST-536-89, MCC, Austin, TX 78759, November 1989.

  2. M. Hermenegildo, F. Rossi. Strict and Non-Strict Independent And-Parallelism in Logic Programs: Correctness, Efficiency, and Compile-Time Conditions. Num. ACA-ST-537-89, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, November 1989.

  3. M. Hermenegildo, K. Muthukumar, K. Greene, F. Rossi, R. I. Nasr. An Overview of the PAL Project. Num. ACT-ST-234-89, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, September 1989.

  4. K. Muthukumar, M. Hermenegildo. Determination of Variable Dependence Information at Compile-Time Through Abstract Interpretation. Num. ACA-ST-232-89, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, March 1989.

  5. K. Muthukumar, M. Hermenegildo. Methods for Automatic Compile-time Parallelization of Logic Programs using Independent/Restricted And-parallelism. Num. ACA-ST-233-89, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, March 1989.

  6. M. Hermenegildo, F. Rossi. On the Correctness and Efficiency of Independent And-Parallelism in Logic Programs. Num. ACA-ST-032-89, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, January 1989.

  7. K. Muthukumar, M. Hermenegildo. Efficient Methods for Supporting Side Effects in Independent And-parallelism and Their Backtracking Semantics. Num. ACA-ST-031-89, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, January 1989.

  8. R. Warren, M. Hermenegildo, S.K. Debray. MA3: A System for Automatic Generation of CGEs. Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, February 1988.

  9. M. Hermenegildo, E. Tick. Memory Performance of AND-Parallel Prolog on Shared-Memory Architectures. Num. ACA-ST-036-88, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, January 1988.

  10. R. Warren, M. Hermenegildo. On the Practicality of Global Flow Analysis of Logic Programs. Num. ACA-126-88, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, January 1988.

  11. M. Hermenegildo, E. Tick. Performance Evaluation of the RAP-WAM Restricted AND-Parallel Architecture on Shared Memory Multiprocessors. Num. PP-085-87, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, March 1987.

  12. R. Warren, M. Hermenegildo. Experimenting with Prolog: An Overview. Num. ACA/PP 43, Microelectronics and Computer Technology Corporation (MCC), 3500 W. Balcones Center Dr. Austin, TX 78759, March 1987.

  13. M. Hermenegildo, P. McGehearty. Address Escaping and Reference Classification in the Design of a Cached, Multiple Cluster, Shared-Memory Architecture. Num. PP-SRS-TM-12, MCC, Parallel Processing Program, 1987.

  14. M. Hermenegildo. Relating Goal Scheduling, Precedence, and Memory Management in AND-Parallel Execution of Logic Programs. Num. PP-408-86, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, December 1986.

  15. M. Hermenegildo, G. J. Lipovski, R. Warren. Goal Scheduling and Memory Management in Parallel Logic Systems. Num. PP-083-86, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, March 1986.

  16. M. Hermenegildo. A Restricted AND-parallel Execution Model and Abstract Machine for Prolog Programs. Num. PP-104-85, Microelectronics and Computer Technology Corporation (MCC), Austin, TX 78759, October 1985.

  17. Sanjay Deshpande, Matt Sejnowski, Manuel Hermenegildo, Julio de Melo, Roy Jenevein, Ashok Adiga, Allan Clarke. TRAC (Texas Reconfigurable Array Computer) - Users' Manual. 1985.

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